1 publication

• Published Subscription 13 Feb 2019

  Characterization of High Speed Phase Frequency Detector Circuit

  By Nilesh D. Patel, Amisha P. Naik

  Abstract: In this paper the performance of high speed phase frequency detector (PFD) is analysed. A high-speed PFD reduces the power consumption of traditional PFD to 0.423 nW at 1 GHz clock frequency and dead zone to 2 ps. It is suitable for low power applications. A PFD uses only 18 transistors. This PFD operates up to 1 GHz at 1.2 V supply voltage. The proposed architecture of the PFD has …

  Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 1, 2015 · pp. 51–58 Read article →