Noise Margin
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R-M and M-R Model for Interpreting Logic State of Memristor Aided NOR with Enhanced Noise Margin
Abstract: Memristive crossbar arrays are one of the fascinating subjects in the field of nanoelectronics and memory devices. The arrangement of arrays consists of grid-like structure with rows and columns of memristors which are resistive devices that can preserve their resistance state even after power is turned OFF. They have now emerged as a promising alternative to traditional memory technologies due to their high density, non-volatility and low power consumption. This …
Published in Recent Trends in Mathematics · Vol. 1, Issue 1, 2024 · pp. 35–41 Read article
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Design of Optimized Full Adder using Noise-Mitigation Techniques and Power Gating
Abstract: With the advent of nanoscale technology, a new era of power consumption, speed, and reliability challenges for traditional static CMOS logic has begun. To solve these problems, dynamic logic families—particularly domino logic—have emerged as potent substitutes that offer quicker processing speeds and lower power consumption. The design and optimization of a full adder circuit using domino logic is shown in this study. A dynamic domino logic technique is used to …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 · pp. 1–6 Read article