Gabor filter

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• Published Subscription Original Research 12 Feb 2024

  Efficient Gabor Filter Design Using Verilog HDL with Multiplier-accumulator (MAC) Implementation

  By Malyadri Paduchur, electronics.editor@celnet.in

  Abstract: This paper introduces a novel and enhanced Gabor filter design aimed at addressing the demands of image processing applications using the Verilog Hardware Description Language (HDL). Specifically, it leverages the Reconstruct Gabor filter technique to elevate the performance and quality of standard image outputs. The primary objective of this research endeavor is to simplify the study, conduct an in-depth analysis, and substantially enhance the design's efficiency, all while ensuring the …

  Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 40–46 Read article →