Domino Logic Circuit

1 article · search the full text for this term

• Published Ahead of print Open access Article 30 Jan 2023

  Design of Decoder Using Domino Logic Circuit for VLSI

  By K. Rama Krishna Reddy, Sai Teja Ankuru, Divya Pillutla, Varthya Shirisha

  Abstract: Dissipation of power from a circuit is the major issue in the design of any VLSI circuit, which decreases the life span of a device/system. NMOS and PMOS circuits are very slow while switching the state from low to high. The speed of the circuit can be increased by decreasing resistance. This process in turn increases the static power dissipation. So, because of these disadvantages, CMOS circuits are used in …

  Published in Journal of VLSI Design Tools and Technology Read article →