distributed arithmetic

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• Published Subscription Review Article 27 May 2026

  Machine Learning–Guided Cognitive RF System with Dynamic FFT Resolution and Multiplier Reconfiguration for Adaptive Anti-Jamming Communication

  By Soham Das, A S Rassel

  Abstract: This paper presents a hierarchical adaptive RF communication system that integrates signal quality-based pre- processing with machine learning-driven signal classification to achieve robust and resource-efficient operation in dynamic, interference-prone environments. Unlike prior art that addresses adaptive RF, ML classification, or anti-jamming individually, this work uniquely combines real-time SNR/RSSI-based signal strength estimation with dynamic FFT size selection (64-, 256- , or 512-point) and arithmetic-level multiplier reconfiguration (CORDIC, Distributed Arithmetic, and hybrid …

  Published in International Journal of Radio Frequency Innovations · Vol. 4, Issue 1, 2026 Read article →

• Published Subscription Original Research 31 Dec 2025

  Low-Power Reconfigurable Digital Filter Design Using FPGA for IoT Edge Devices

  By Bhima Shankar Kumbhar, Rohidas Kendre, Vaibhav Godase

  Abstract: The rapid evolution of the Internet of Things (IoT) has led to an exponential increase in the deployment of edge devices that continuously process real-time sensor data under strict power, latency, and computational constraints. Digital filtering remains a critical operation in these devices, supporting tasks such as noise removal, data conditioning, and feature extraction for intelligent decision-making. However, conventional filter implementations on microcontrollers or fixed digital signal processors often struggle …

  Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 2, 2025 · pp. 23–34 Read article →