Comparator
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Design and Validation of Low Power High Speed area effective comparator using CMOS Technology
Abstract: The most fundamental arithmetic comparisons in a digital comparator involve comparing two numbers that are greater than, less than, or equal to each other. While doing enormous level arithmetic comparisons, a digital comparator needs more space, which results in higher power consumption and a delayed response. This can be solved by using N-bit comparator with two modules using 45GPDK CMOS Technology. An N-bit comparator can operate at extremely high speeds …
Published in Recent Trends in Electronics Communication Systems · Vol. 10, Issue 2, 2023 · pp. 20–29 Read article
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Design of Fault Tolerant Reversible Comparator
Abstract: Reversible circuits have proved its significance in the synthesis of circuits having their important role in nanotechnology, quantum computing, low power CMOS Design, cryptography and Bioinformatics. The Reversible Gates can be further made more beneficial if they prove themselves to be Fault Tolerant i.e. where errors can be detected and corrected at the same time. This Paper considers parity preserving technique for making Reversible circuits Fault Tolerant. Parity Preserving Gates …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 2, 2019 · pp. 13–17 Read article