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4 articles for “frequency shift sensing”
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Performance analysis of cross-slotted patch antenna for wireless system applications
Abstract: A C-band cross-slotted microstrip patch antenna for ice and frost detection in wireless sensing applications. The antenna configurations with distinct cross-slot geometries are designed to investigate their influence on impedance matching, radiation characteristics, and sensing sensitivity. The antennas are modeled and analyzed using Ansys HFSS, and their dimensions are optimized using standard microstrip antenna design equations. Ice and frost accumulation on the antenna surface is identified through measurable shifts in …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 13, Issue 1, 2026 · pp. 35–50 Read article
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Silkworm Growth and Silk Yield under Changing Climatic Conditions: Challenges and Adaptations
Abstract: Climate change is emerging as a critical factor affecting agriculture and sericulture industries worldwide. Rising global temperatures, shifting rainfall patterns, and the growing frequency of extreme weather events present ever challenges to the growth and productivity of silkworms (Bombyx mori L.). Silkworms are extremely sensitive to environmental conditions like temperature, humidity, and photoperiod, all altered by climate change. Higher temperatures can accelerate silkworm metabolism, reduce silk yield, and increase susceptibility …
Published in International Journal of Insects · Vol. 1, Issue 2, 2024 · pp. 1–5 Read article
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Traffic Management System using Divider Shifting Mechanism
Abstract: This paper addresses traffic congestion through innovative solutions, including movable dividers that adjust road configurations and lanes dynamically. Real-time monitoring, using sensors and cameras, coupled with advanced algorithms, optimizes traffic flow by reallocating lanes according to changing conditions such as rush-hour congestion or accidents. Additionally, the system integrates variable speed limits and dedicated lanes for pedestrians and cyclists to enhance safety and accommodate diverse transportation modes. Centralized integration with a …
Published in Journal of Production Research & Management · Vol. 14, Issue 1, 2024 · pp. 21–28 Read article
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DFT Compatible Low Power EDAC Based on Clock Gating
Abstract: The in-situ EDAC architecture is normally hired in timing-error tolerant circuits in a try and decrease the conservative timing protect band due to procedure, voltage, and temperature (PVT) fluctuations. But with the addition of the latch-based totally data channel, extra detection, and propagation common sense, it makes the implementation of the layout for- testability (DFT) tough. We present a new low area test overhead DFT EDAC architecture with extreme reduction …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 41–53 Read article