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9 articles for “ASICS”
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All-Digital Phase Locked Loop (ADPLL) as an Intellectual Property (IP) Core for an Application-specified Integrated Circuit (ASIC) Product: A Survey
Abstract: An all-digital phase locked loop (ADPLL) plays a great role in decreasing the development time of an application-specified integrated circuit (ASIC) products and helps to meet the time-to market requirement of product, because an ADPLL can be used as an IP core, so it is easily reusable in any design. Now a days ADPLL is being widely used in various fields such as control systems and digital communication systems. This …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 12–17 Read article
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Power Estimation Approach for Artix 7 FPGA using Machine Learning Technique
Abstract: Abstract This paper presents the power estimation approach using a suitable machine learning technique. Artix7 FPGA has been chosen as the target FPGA (Field Programmable Gate Arrays) platform for understanding the methodology of power estimation. There are various approaches of power estimation for FPGAs that have been given in the literature viz. probabilistic, statistical, and LUT-based, etc. In the past few years, the demand for hand-handled devices like smartphones, tabs, …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 9, Issue 1, 2021 · pp. 1–5 Read article
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A Novel Architecture of Control System Processor Using Field Programmable Gate Array
Abstract: This paper presents a reconfigurable architecture of control system processor. The performance of the proposed architecture has been evaluated by taking different controllers and phase lead and phase lag networks. We designed the architecture of the processor and realizing the architecture using adder, multiplier, delay unit and validate it in the FPGA, which show that the hardware scheme is feasible for practical application. The experimental results clearly reveal the novelty …
Published in Journal of Microcontroller Engineering and Applications · Vol. 2, Issue 2, 2015 · pp. 13–20 Read article
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Power Estimation of MAC Block for Artix 7 FPGA using Regression Technique
Abstract: This paper presents the power estimation approach using suitable machine learning technique. Artix-7 FPGA has been chosen as target FPGA (Field Programmable Gate Arrays) platform for understanding the methodology of power estimation. There are various approaches of power estimation for FPGAs have been given in the literature viz. probabilistic, statistical, and LUT based etc. However, this paper discussed a supervised machine learning approach namely curve fitting and regression analysis. The …
Published in Journal of Microcontroller Engineering and Applications · Vol. 8, Issue 3, 2021 · pp. 27–37 Read article
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Hierarchical Methodology Approach to SOC Design: A Comprehensive Look
Abstract: The design scale of a chip has increased many folds in the last few years and shows a continuous exponential trend. This is made possible by the reduction in transistor size and an evolving process technology. As a result, it is possible to move to SoC technology (System on Chip-A single die consisting of multiple subsystems) rather than a traditional ASIC. This has obviously resulted in an increase in the …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 3, 2020 · pp. 35–42 Read article
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Power Estimation Approach for Artix 7 FPGA using Machine Learning Technique
Abstract: This paper presents the power estimation approach using a suitable machine learning technique. Artix7 FPGA has been chosen as the target FPGA (Field Programmable Gate Arrays) platform for understanding the methodology of power estimation. There are various approaches of power estimation for FPGAs that have been given in the literature viz. probabilistic, statistical, and LUT- based, etc. In the past few years, the demand for hand-handled devices like smartphones, tabs, …
Published in Research & Reviews: A Journal of Embedded System & Applications Read article
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The Evolution of Digital Integrated Circuits: A Journey Through Technological Advancements
Abstract: The evolution of digital integrated circuits (ICs) is a remarkable journey that has transformed the worldof technology over the past several decades. This abstract provides an overview of the comprehensivearticle that explores this evolution. The journey begins with the birth of digital integrated circuits in thelate 1950s and early 1960s when the first ICs containing a small number of transistors emerged. Theseearly ICs laid the groundwork for a technological revolution …
Published in Journal of Microcontroller Engineering and Applications · Vol. 10, Issue 2, 2023 · pp. 15–18 Read article
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A Novel Conflict-Free Efficient Memory-Based Real FFT Processor using UTB
Abstract: AbstractWe present “A Novel Conflict-Free Efficient Memory-Based Real Fast Fourier Transform (RFFT) using Urdhva Tiryagbhayam Butterfly”. In this paper different FFT lengths for address schemes are integrated that supports FFT processing which are used in diverse systems such as telecommunications. Address methods for various FFT lengths are coordinated in this paper to help FFT processing for different frameworks like broadcast communications. The memory bank and address can be produced by …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 3, 2019 · pp. 1–11 Read article
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A Protected IEEE 802.15.4 Transceiver Design by a Physical Layer Encryption Approach
Abstract: AbstractWith the multiplication of Internet of Things (IoT), the IEEE 802.15.4 physical layer is winding up progressively, well-known due to its low power utilization. Be that as it may, secure data communication over the system is a testing issue since vulnerabilities in the existing security natives prompt a few assaults. The alleviation of these assaults independently includes noteworthy processing load the honest to goodness hub. In this paper, we propose …
Published in Recent Trends in Electronics Communication Systems · Vol. 5, Issue 2, 2018 · pp. 1–6 Read article