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1631 articles for “Abstractive”
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Modeling and Simulation of Pentacene based Organic Thin Film Transistors with Organic Gate Dielectrics
Abstract: AbstractTwo structures of pentacene organic thin film transistors (OTFT) with organic dielectrics, polymethyl methacrylate (PMMA) and polyvinyl alcohol (PVA) have been numerically simulated with TCAD ATLAS tool. Output and transfer characteristics were simulated and mobility, threshold voltage, sub threshold swing (SS) and current on/off ratio that play a part in the increment of conductivity of device were extracted. The authors show that the semiconductor-insulator interface actively affects the performance of …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 13–18 Read article
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Numerical Simulation and Modeling of Graphene Field Effect Transistors for High Frequency Applications
Abstract: AbstractIn this paper numerical simulation of graphene field effect transistor (GFET) has been performed using finite element method by solving Poisson's equation, continuity equation and energy balance equation self consistently. Various performance characteristics including charge distribution, band gap energy, transfer and output characteristics, electrostatic potential distribution and transconductance have been extracted.Keywords: Graphene field effect transistor (GFET), energy balance equation, mobility, ambipolar, numerical simulationCite this ArticleAshish Jha, Dwivedi ADD. Numerical Simulation …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 27–33 Read article
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Low-Complexity VLSI Hardware Design for DWPT
Abstract: AbstractThis paper presents a low-complex discrete wavelet packet transform (DWPT) architecture design for power constrained and cost sensitive healthcare applications. The multiplier-adder unit of the proposed multiplier-based designs of DWPT is replaced by the shift-add unit to reduce the area complexity of parallel structure. The proposed low-complexity multiplier-less design could be used an alternative to the existing multiplier-based design for hardware efficient realization of multi-level DWPT.Keywords: DWPT, Hardware complexity, VLSI, …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 28–32 Read article
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Performance Analysis of 1-Bit Half Adder using Different Combinational MOS Logics
Abstract: AbstractAdder is required for many processors designing like microprocessors, digital signal processors, image processing and various VLSI applications. The overall performance of system depends upon the adder circuits due to its presence mainly in critical paths of system. This paper presents half adder circuits using different combinational MOS logics. All the circuits were analyzed to find the most suitable circuit which consumes less power without costing the speed of the …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 19–27 Read article
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Computer Modeling of Organic Thin Film Transistors (OTFTs) using Verilog-A
Abstract: AbstractOrganic electronics has drawn considerable attention of the researchers with organic thin film transistors (OTFTs) as key components for various applications. Compared to the silicon industry where public models are well defined and commonly used to provide designers with a relative good description of any process, organic devices are still lacking for their complete device models that can fully describe their electrical characteristics. Therefore, compact model development for OTFTs is …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 1–7 Read article
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Distribution Power Loss Minimization by Network Reconfiguration and DG Placement
Abstract: AbstractThe paper presents an efficient algorithm for network reconfiguration associated with DG allocation to minimize real power losses in radial distribution networks. Selective Particle Swarm Optimization algorithm (SPSO) is used to find new tie switches. Allocation of DG units has been done by new analytical approach. The proposed analytical method for optimal DG placement is developed based on a new mathematical formulation. DG type-I is used to solve the problem. …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 8–19 Read article
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Analysis of Signal Delay in Carbon Nano Tube based Interconnects at 32 nm Technology Node
Abstract: AbstractIn the present world demand for portable devices and high speed processor is rising which brings out a challenging issue of scaling for designers. In this paper, we have presented the effect of copper and CNT based interconnects for different length at 32 nm technology node. The performance of both types of interconnects are analyzed and compared in form of propagation delay. Propagation delay in interconnects between the elements is …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 20–26 Read article
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Optimizing the Ratio of Number of Tubes in PCNTFET to NCNTFET for Digital Circuits
Abstract: AbstractCarbon nanotube Field Effect Transistors (CNTFET) offer various benefits as compared to other FETs. Many circuits can be constructed using PCNTFETs (P-type CNTFET) and NCNTFETs (N-type CNTFET) similar to the PMOS and NMOS of the CMOS technology. The CNTFETs employ carbon nanotubes in the channel of the device to provide a path for the ballistic conduction of electrons. The different ratios of number of tubes in channel of the PCNTFET …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 34–40 Read article
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Implementation of FIR Filter with Reverse Converter based RNS Kogge–Stone Adder
Abstract: AbstractLow power very large scale integration (VLSI) circuits are pertinent for designing of steep overall performance and adjustable devices. In current technology VLSI plays a vital role to reduce power consumption and delay. In analog to digital converter process, adder plays a crucial role. The authority of nonviolent issue is increasing regularly because of changing that a way, packaging and cooling cost, transportable route of motion and reliability. This freebie …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 34–43 Read article
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Synthesis and Characterization of Nickel doped Barium Niobate Ba (Ni0.5Nb0.5)O3 (BNN) Nanomaterial
Abstract: AbstractFerroelectric materials are of great interest for researchers worldwide, because of their unique physical properties and wide range of applications. The composite nanomaterial Ba(NiNb)0.5O3 (BNN) was synthesized by conventional solid state reaction method. The structural characterization was done by x-ray diffraction (XRD). The research was carried out to investigate structural properties of BNN nanomaterial as a function of sintering duration. BNN was sintered at 10000C and different samples were prepared …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 29–33 Read article
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Performance Analysis of Complimentary Pass Transistor Logic Based Multiplexer Using Dual-gate FinFET Technology
Abstract: AbstractThis paper presents the design and analysis of double gate FinFET complimentary pass transistor logic (CPL) multiplexer. The circuit of multiplexer (MUX) using CPL is used for comparison of performance parameters like average power consumption, rise/fall time, delay, slew rate, PDP and EDP. Multiplexer is a digital circuit, it has inputs and select line; select lines are used for select input lines to transfer data to the output end. The …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 41–48 Read article
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A Study of Flyback Microinverter Topologies for Photovoltaic Applications
Abstract: AbstractThe microinverter system plays an imperative role in photovoltaic applications. Nowadays a central inverter system is substituted by a microinverter. The flyback inverter has the following advantages such as transformer separation, high voltage step-up ratio, low volume, high reliability, and provides high efficiency and relatively simple control. This paper proposes a collation of different flyback inverter topologies operating under various control schemes. A single phase current source inverter with hybrid …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 1–10 Read article
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Design and Performance Analysis of Full Adder Cell using FinFET Technique at 32nm Technology
Abstract: AbstractIn this paper, discussed is the comparative analysis of complementary MOS (CMOS) and dual gate-FinFET (fin shaped field effect transistor) based full adder cell design. To reduce the average power, average current and maximum current of 1-bit full adder circuit a new high DG-FinFET technique is presented. Use of double-gate FinFET technology provides low leakage and high performance operation. For MOSFET transistor model, a predictive technology model (PTM) BSIM4 and …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 1–8 Read article
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High Throughput LMS Adaptive Filter Architectures using Pipelining and Parallel Processing
Abstract: AbstractIn this paper, a study on existing designs of adaptive filter based on LMS algorithm is done. The primary aim is to reduce the critical path delay and thereby improve throughput. The excess use of multipliers or the lack of a time efficient one and longer cycle periods reduces the effectiveness of any adaptive filter implementation. Here, a simple and highly time efficient Vedic multiplier is used in the implementation …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 11–19 Read article
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Harmonic Analysis of Single Phase Inverter
Abstract: AbstractIn this paper, study is carried out to investigate the THD of various voltage control signal techniques for single phase PWM inverter. The inverter is implemented using three pulse width modulation techniques- unipolar PWM, modified sine PWM and harmonic injection modulation. The performance of these control schemes are evaluated through simulation in MATLAB/SIMULINK. The obtained THD and fundamental magnitude of the output AC is tabulated.Keywords: Single phase inverter, pulse width …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 20–28 Read article
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Ultra Low-Power 9-Transistor Flip-Flop Design
Abstract: AbstractThe use of very large scale integration technology in high performance computing, wireless communication, consumer electronics has been rising at a very fast rate. The challenge for VLSI technology is mainly in leakage power consumption. Flip-Flops (FFs) are the basic storage elements used extensively in digital system designs. It accounts for 20%–45% of the total system power and may considerably impact the chip area. In this paper, an ultra-low-power true …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 27–32 Read article
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Analysis of DIBL Effect in MOSFET Working
Abstract: AbstractOne of the most widely used electronic devices, particularly in digital integrated circuits, is the metal insulator semiconductor (MIS) transistor. Most of the existing transistors used in fabrication of integrated chips are with junctions. The device scaling is growing the channel length between junctions in devices are scaling gone down to 10 nm. Drain Induced Barrier Lowering (DIBL) effect is prominent as the feature size of MOS device keep diminishing. …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 33–40 Read article
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Gallium Nitride based HEMTs in Nano-Scale Regime
Abstract: AbstractIn this work, a maximum drain current of 557 mA is achieved by the simulated structures of double-heterojunction HEMTs using the SILVACO-ATLAS software tool. The drain current is found to be higher at shorter gate length. The drain current is observed as higher at larger aluminium mole fraction. The drain current is also higher at larger thickness of AlGaN barrier layer. Again, the drain current is higher at larger doping …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 11–21 Read article
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Efficient ADP Scheme for DWT Computation
Abstract: AbstractIn this paper, the lifting and flipping scheme for discrete wavelet transform (DWT) computation and proposed an area delay efficient lifting based DWT architecture. In this computation huge number of multipliers and adders are saved when lifting based 2-D DWT architecture implemented. The derived full-parallel lifting-based 1-level 2-D DWT structure involves half number of less multiplier than the flipping-based 2-D DWT structure. Compared with the existing lifting-based structure, the proposed …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 22–26 Read article
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Influence of Graded Channel on Performance of Symmetric Double Material Gate Insulator FDSOI MOSFET
Abstract: Abstract: In this paper, we investigate the effect on the linearity, analog and RF performance of graded channel in case of hetero-gate-dielectric FDSOI MOSFET with higher doping at source end and low doping at drain end. The major figure of merits (FOMs) studied are on-state drive current (ION), transconductance (gm), total gate capacitance (Cgg), cut-off frequency (fT), higher order derivative of transconductance (gm’, gm’’), intermodulation distortion (IMD3) and third- order …
Published in Journal of Microelectronics and Solid State Devices · Vol. 6, Issue 1, 2019 · pp. 12–17 Read article