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24 articles for “Transconductance”
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Design of Low Power Folded Cascode Current Mirror CMOS OTA and Implementation of 2nd Order Gm-C IF Filter with Analysis of S-Parameter
Abstract: This paper deals with design and optimization of a cascode current mirror folded cascode operational transconductance amplifier is done in order to optimize MOS transistor sizing. The design of folded cascode OTA, which works for frequencies that lead to a base band circuit design for RF application, is based on transistor sizing methodology and Simulation results are performed using SPICE software and BSIM3V3 model for CMOS 0.18μm process, show that …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 2, 2013 · pp. 12–23 Read article
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Nonlinear Semiconductor Device Modeling using Neural Networks
Abstract: This paper describes the nonlinear semiconductor (transistor) of small and large signal modeling using a single neural network. Multilayer perceptron (MLP) with back-propagation (BP) learning is adopted in this work to model the drain current (ID) and the transconductance (gm) of the transistor. MLP modeling performance in terms of mean square error (MSE) and complexity of the network are illustrated briefly. Artificial neural network (ANN) model outcome for nonlinear function …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 3, 2014 · pp. 1–6 Read article
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Performance Analysis of Ultra-Short Junctionless DGMOS Nanowire Transistors with High-k Gate Dielectric
Abstract: AbstractIn this report, we present a comparative analysis of ultrashort 3-D junctionless nanowire DGMOS transistors using different high-k gate dielectric by virtually fabricating the device in Visual TCAD. The ultrashort devices having channel length of 20 nm were simulated and performances like I-V characteristics, transconductance etc. were analysed. It was found that HfO2 has better steady state performances as gate dielectric owing to better control of the channel over the …
Published in Journal of Communication Engineering & Systems · Vol. 9, Issue 1, 2019 · pp. 35–42 Read article
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Advanced Mathematical Modelling of Nanoscale Semiconductor Devices for Low-Power Microelectronic Applications
Abstract: With the ongoing scaling down of semiconductor devices, there is an increasing need for accurate mathematical models of electrostatic control, carrier transport, leakage current, and power consumption at the nanometer scale. As the sizes of semiconductors continue to decrease, there is a growing need for accurate mathematical models of electrostatic control, carrier transport, leakage current, and power consumption at the nanometer scale. In this work, a common mathematical modelling approach …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 2, 2026 Read article