STM Journals Peer-reviewed research from Consortium e-Learning Network

Journal of Microelectronics and Solid State Devices

Built in Self Repair for Embedded Memories: A Survey

  1. Jyotika .
  2. Balwinder Singh
  3. D. K. Jain

Abstract

Memory is a significant part of every single computing system. In SOC (System-on-a-chip), 90 to 92% of the total chip zone is enclosed by embedded memories (ITRS 2009) and that means memory density is higher than the logic density. Consequently testing and diagnosis of memories are imperative issues in the SOCs. Revenue of memory is pretentious by the accountabilities present in memory which also distresses the yield of SOC. Built in self-repair procedures are used to restore the embedded memories. Built in self-repair procedures are used for the improved yield of the system by using numerous skills like 1-D Redundancy and 2-D Redundancy. Test, redundancy analysis, repair delivery are the three elementary paces for the memory repair. A built in redundancy algorithms (BIRA) are used to contrivance built in self-repair (BISR).
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