4 publications
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Design And Implementation Of Audio Steganography On FpgaBy Vijay Savani, Akash Mecwan, Viren Gajjar
Abstract: As the emergence of latest hacking programs and attention of hackers in hacking more and more data, the need arises to make an integrated circuit that can help hiding the message in such a form that no one can hack it easily. The audio Steganographer is a device or an integrated circuit that facilitates the user to hide a massage in the ongoing digital audio stream. It also ensures the …
Published in Journal of Electronic Design Technology · Vol. 1, Issue 1-3, 2011 · pp. 1–6 Read article →
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Analysis and Characterization of Different Topologies of Dynamic Latch based CMOS Comparators for Delay, Offset and PowerBy Vijay Savani, N. M. Devashrayee
Abstract: This paper presents the analysis and characterization of various topologies of dynamic latch based complementary metal oxide semiconductor (CMOS) comparator. Various comparator topologies like resistor divider comparator (RDC), differential pair comparator (DPC), double-tail dynamic latched comparator (DTDLC), energy efficient two-stage comparator (ETWC) and two-stage dynamic comparator (TSDL) are analyzed and compared for various performance parameters. Besides zero static power consumption, resistor divider comparator has high offset voltage and it depends …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 86–98 Read article →
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Performance Analysis and Characterization of Shared Charge and Clocked-Latch based Comparator using 90-nm TechnologyBy Vijay Savani, N. M. Devashrayee
Abstract: Paper describes the performance analysis, implementation and characterization of low-power and high-speed shared charge clocked-latch based comparator using 90-nm technology. There are two different topologies of the comparator viz. impedance dividing and differential current sensing comparators are combined to take the advantages and use their good features. The main focus of design is on improvement in speed by sharing charge and reduction in power dissipation. The topology is implemented in …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 3, 2014 · pp. 20–26 Read article →
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Design and Analysis of Source Current Effect on Preamplifier-Positive Feedback-based CMOS Comparator Using 90 nm TechnologyBy Vijay Savani, NM Devashrayee
Abstract: One of the most important and essential components of the data converter circuit is the comparator and this paper presents the implementation and characterization of the basic and simplest CMOS comparator in 90 nm technology. Once the technology scales down, the design and implementation becomes an essential issue at sub-micron and deep-sub-micron technology. The behavior of the threshold voltage in the CMOS is not a linear quantity when the parameters …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article →