4 publications
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Hardware Design using Flexible Hk-MeansBy SIMI P THOMAS, Anu Jose, Resma Chandran V.P, Merin Pius
Abstract: High performance hardware is required to meet the necessities of consumer electronics. Color quantization and image partition are an inevitable part for different applications, and HKMeans is the main algorithm that is used for color quantization and image partition owing to its low cost, less computational time and the hardware area required. The computational time and the hardware area increases as the quantization number increases. Hierarchical K-means or HK-Means is …
Published in Journal of Electronic Design Technology · Vol. 6, Issue 1, 2015 · pp. 30–35 Read article →
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Near Field Wireless Powering of Implantable DevicesBy SIMI P THOMAS, Aparna Jose
Abstract: A new WPT system for biomedical applications has been investigated in this paper. First, an implantable receiving antenna with enhanced gain is studied. Then, a transmitting antenna array which can maximize the PTE of the WPT system is designed together with the receiving antenna and head model. Under the transmission distance of 150 mm, the PTE of the designed WPT system reaches a maximum value of 0.28% at the center …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 1, 2019 · pp. 44–50 Read article →
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Background Suppression for Visual Surveillance Using SOMBy SIMI P THOMAS, Anu Jose, Resma Chandran V. P., Sunu Ann Thomas
Abstract: AbstractBackground suppression is widely used approach for detection of moving objects in video streams which is the first relevant step of information extraction in many computer vision applications. Aside from the intrinsic usefulness of being able to segment video streams into moving and background components, detecting moving objects provides a focus of attention for recognition, classification, and activity analysis, making these later steps more efficient. An approach based on self-organization …
Published in Journal of Communication Engineering & Systems · Vol. 5, Issue 1, 2015 · pp. 15–20 Read article →
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Transistor Full Adder: A Comparative Performance AnalysisBy SIMI P THOMAS, Aparna Jose
Abstract: AbstractIn this work the static energy recovery full adder named 10T13A with reduced 10 transistors is implemented. The fan in and fan-out of gates is also reduced by reducing number of transistors. Calculation of 10T13A full adder various parameters has been at 45 nm technology and compared with MTCMOS technique based 10T13A Full Adder. The active power has been calculated at 45 nm technology using Cadence Virtuoso Tool. Simulation results …
Published in Recent Trends in Electronics Communication Systems · Vol. 5, Issue 3, 2018 · pp. 22–31 Read article →