2 publications

• Published Subscription 25 Jan 2021

  FPGA Implementation of Variable Step Size Adaptive Filters for Signal De-noising

  By Ravi Kumar, Aditya Bali

  Abstract: This paper presents the design and implementation of a variable step size 40 order adaptive filter for de-noising acoustic signals. Four different adaptive filters (LMS, Sign-Data, Sign-Error and Sign-Sign) were designed using three different structures, viz., direct form, transposed and the proposed structure and their de-nosing performance was compared. Further, the filters were implemented on three different Field programmable gate arrays (FPGAs), viz., Spartan 6, Virtex 6 and Viretx 7 …

  Published in Journal of Semiconductor Devices and Circuits · Vol. 1, Issue 3, 2014 · pp. 7–19 Read article →

• Published Subscription 22 Jan 2021

  Artificial Neural Network Implementation in FPGA using Multiplexer-based Weight Updating for Efficient Resource Utilization

  By Ravi Kumar, Deepak Gupta

  Abstract: This paper presents a novel scheme for field-programmable gate array (FPGA) implementation of an artificial neural network (ANN). The proposed implementation is aimed at reducing resource requirement, without compromising on the speed so that a complex ANN architecture could be realized on a single chip at a lower cost. The weight updating process in different layers of the ANN has been carried using a simple MUX-based architecture. Backpropagation algorithm which …

  Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 1, 2015 · pp. 1–5 Read article →