2 publications

• Published Subscription 13 Jan 2021

  Designing of Low Power Charge Pump Circuit with Minimum Current Mismatch for High Speed PLL Applications

  By D. Shekhar, A Raman

  Abstract: Charge pump (CP) is one of the necessary block of phase locked circuit (PLL). This paper presents the new design of CP circuit, i.e., cascode current source biased transmission gate based CP circuit. Cascode current mirror, transmission gate switches and unity gain follower amplifier are combined to design the CP circuit in 65 nm technology. The reference current is used to bias the switches of CP circuit so that current …

  Published in Journal of Electronic Design Technology · Vol. 6, Issue 3, 2015 · pp. 1–8 Read article →

• Published Subscription 11 Mar 2019

  A Review on Charge Pump Circuits for PLL Applications

  By D. Shekhar, A Raman

  Abstract: This paper presents a review on various architectures of charge pumps (CP) for high speed Phase-locked loop (PLL) applications. The different nonlinear marvels that influence the execution of PLL in view of the CPs circuit are examined. The various high performance CP circuits with reference voltage source, reference current source are analyzed that reduces the problems associated with the traditional charge pump circuit that consists leakage current, clock feed-through, charge …

  Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 1–11 Read article →