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• Published Subscription 2 Jan 2021

  Implementation of Sense Amplifier-based D Flip-Flop using 0.25 µm and 0.18 µm Technology

  By Piyush M. Bhatasana, Vijay G. Savani, Akash I. Mecwan

  Abstract: The traditional flip-flops and latches suffer from the large delays and the race conditions. This paper describes a new approach to the D flip-flop design using the sense amplifier. The previous efforts in the same direction made at the 0.25 µm technology exhibit improvements in clock-to-output delay and power dissipation with respect to recently proposed high-speed flip-flops. The paper discusses the flip-flop at 0.18 µm technology. The output latch of …

  Published in Journal of Electronic Design Technology · Vol. 4, Issue 3, 2013 · pp. 10–13 Read article →