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A Novel Approach for 3D Floor Planning in VLSI with Minimum Dead Space using a New Topological StructureBy ajoy kumar khan
Abstract: Floor planning is a key issue in VLSI physical plan. The floor planning issue can be defined as that a given arrangement of 3D rectangular pieces while limiting reasonable cost capacities. Here, we are focusing on the minimization of the aggregate volume of 3D bite the dust. In this paper, another initial topological structure is presented utilizing weighted coordinated chart of a floor planning issue in 3D VLSI physical plan. …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 1, 2017 · pp. 6–17 Read article →