3 publications
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Published Subscription
Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data StabilityBy P. Raikwal, V. Neema, A. Verma
Abstract: The demand of static random access memory cell in embedded memories is rapidly increasing. To design SRAM is continuously becoming difficult due to limitation of weaker write margin, degraded data stability and higher leakage power consumption. In order to overcome these limitations, new 8T SRAM has been explored. The simulation results depicts better data stability, low access delay and decreased leakage power consumption. Alternatively, proposed cell with sleep transistor and …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 35–44 Read article →
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Published Subscription
Cluster Based Sleep Transistor Approach for Low Power 6T SRAM CellBy P. Raikwal, V. Neema, A. Verma
Abstract: The demand of high density VLSI circuits has been increasing as the size of ICs is becoming small day by day. It has been seen that, to reduce active power dissipation in memory, the supply voltage reduction is necessary. Lowering the supply voltage is one of the most straightforward and effective ways to suppress the energy consumption because reducing the supply voltage could reduce the dynamic power and leakage power …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 41–48 Read article →
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Published Subscription
Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data StabilityBy P. Raikwal, V. Neema, A. Verma
Abstract: The demand of static random access memory cell in embedded memories is rapidly increasing. To design SRAM is continuously becoming difficult due to limitation of weaker write margin, degraded data stability and higher leakage power consumption. In order to overcome these limitations, new 8T SRAM has been explored. The simulation results depicts better data stability, low access delay and decreased leakage power consumption. Alternatively, proposed cell with sleep transistor and …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 35–44 Read article →