sub-station
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Detection of Fault and Protection of Faulted Distribution Feeder with Field Programmable Gate Array Using State Diagrams
Abstract: A hardware-efficient algorithm for fast fault-detection in feeders radiating out of a distribution substation and its subsequent clearance from the system for safe operation of the healthy parts has been presented in the paper. State diagrams used to design the circuit.The general purpose SPARTANE 3AN FPGA kit has been employed for developing the protective over-current relay. All the coding has been done using the hardware description language VERILOG. To avoid …
Published in Journal of Microcontroller Engineering and Applications · Vol. 2, Issue 2, 2015 · pp. 5–12 Read article