FPGA Implementation

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• Published Subscription Review Article 2 Apr 2026

  Automatic Coffee Making Machine Using Verilog HDL

  By M Krishna Vamsi, K Lakshman Teja, R Yeswanth Narayana, K Bhaskara Sai Srivardhan, K Siva Ranjini

  Abstract: This Paper focuses on the design and implementation of a Coffee Machine using Verilog, aimed at understanding how real-life machines can be controlled using digital logic. In daily life, a coffee machine works by taking user inputs, processing them, and giving the required output such as preparing coffee. The main objective of this project is to design a simple digital system that controls the basic working of a coffee machine. …

  Published in Journal of Electronic Design Technology · Vol. 17, Issue 1, 2026 · pp. 18–24 Read article →

• Published Subscription Review Article 19 Mar 2026

  MAC Unit Implementation on FPGA

  By Dnyaneshwari L. Shinde, Alisha B. Mulani

  Abstract: Multiply–accumulate (MAC) computations account for a large part of machine learning accelerator operations. The pipelined structure is usually adopted to improve the performance by reducing the length of critical paths. An increase in the number of flip-flops due to pipelining, however, generally results in significant area and power increase. Using this method, we create and build a cutset-free feedforward MAC architecture that maximizes data propagation and removes superfluous pipeline registers. …

  Published in Journal of Microcontroller Engineering and Applications · Vol. 13, Issue 1, 2026 · pp. 29–37 Read article →