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27 articles for “Star graph”
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Hierarchical Methodology Approach to SOC Design: A Comprehensive Look
Abstract: The design scale of a chip has increased many folds in the last few years and shows a continuous exponential trend. This is made possible by the reduction in transistor size and an evolving process technology. As a result, it is possible to move to SoC technology (System on Chip-A single die consisting of multiple subsystems) rather than a traditional ASIC. This has obviously resulted in an increase in the …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 3, 2020 · pp. 35–42 Read article
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Design Conceptualization and Computational Analysis of Cryogenic Engine Nozzle-ABYOM
Abstract: The main purpose of this paper is to design a cryogenic engine nozzle with specified dimensions using CATIA V5 software and analyze the nozzle using ANSYS software. The realizable k-ε viscous model was used for calculation and the Hydrogen (H2) had retained as an ideal gas. The CFD simulations were done on the nozzle to find the pressure, density, velocity, and temperature. In the graph, there are 500 points streamlined …
Published in Journal of Materials & Metallurgical Engineering · Vol. 13, Issue 4, 2023 · pp. 14–23 Read article
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Design conceptualization and computational analysis of cryogenic engine nozzle -ABYOM
Abstract: The main purpose of this paper is to design a cryogenic engine nozzle with specified dimensions using CATIA V5 software and analyze the nozzle using ANSYS software. The realizable k-ε viscous model was used for calculation and the Hydrogen (H2) had retained as an ideal gas. The CFD simulations were done on the nozzle to find the pressure, density, velocity, and temperature. In the graph, there are 500 points streamlined …
Published in Journal of Materials & Metallurgical Engineering · Vol. 12, Issue 2, 2022 · pp. 14–23 Read article
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Building Scalable Microservices with Micronaut, Kotlin, and AWS DynamoDB: A Comprehensive Architecture Study
Abstract: The evolution of enterprise software has trended steadily toward microservice architectures due to their inherent scalability and resilience advantages over monolithic systems. This research explores a comprehensive implementation approach using Micronaut, an innovative JVM-based framework specifically designed for resource-efficient microservices. The study combines Micronaut with Kotlin programming language and leverages AWS DynamoDB as a scalable NoSQL persistence layer, with Apache Kafka providing event-driven communication capabilities. We explore the critical role …
Published in Journal of Mobile Computing, Communications & Mobile Networks · Vol. 12, Issue 2, 2025 · pp. 40–57 Read article
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Review of Haptic Gloves for Touching Virtual Reality
Abstract: Individuals who have ever been immersed in a Virtual Reality (VR) environment have likely fantasised about the possibility of being able to physically interact with virtual items as well as manipulate them with only their hands. Unfortunately, this demands a lot more than just a graphic board that is quick as well as a display that is immersive in its visual effect. In order to facilitate contact between multiple fingers, …
Published in Recent Trends in Electronics Communication Systems · Vol. 10, Issue 3, 2023 · pp. 15–22 Read article
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Magnitude of Premarital Sex and Associated Factors among Preparatory School Students in Alamata Town, North Ethiopia, 2014
Abstract: Worldwide adolescents, both boys and girls, are physically mature earlier and the age at which people marry is rising. These leave a widening of gap time during which adolescents can potentially engage in unprotected and unsafe premarital sex. The purpose of this study was to assess the magnitude of premarital sex and associated factors among Alamata preparatory school students, Northern Ethiopia. A school-based, cross-sectional study was conducted in Alamata town …
Published in Research and Reviews: A Journal of Health Professions · Vol. 6, Issue 2, 2016 · pp. 12–20 Read article
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RTL to GDSII Implementation UART using Verilog and Cadence tools
Abstract: The paper outlines a thorough design flow for Universal Asynchronous Receiver and Transmitter (UART) utilizing Register Transfer Level (RTL) to Graphic Data System II (GDS II) Implementation using Verilog and Cadence tools. The process involves RTL design, logic synthesis with Genus and physical design using Innovus, followed by verification steps including formal verification, static timing analysis and power optimization. The results demonstrate an efficient workflow, highlighting the effectiveness of Cadence’s …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 1, 2025 · pp. 1–7 Read article