Journal of VLSI Design Tools and Technology
Volume 4, Issue 1 (2014)
Published
Table of contents
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A Novel Design for Power Reduction in Arithmetic Circuits using MTCMOS Technology
Abstract: In CMOS logic circuits, the reduction in the threshold voltage due to voltage scaling leads to increase in the subthreshold leakage current and hence static power dissipation. Although power consumption is important for modern VLSI design, operation speed and occupied area are still the main requirements of the VLSI design. Multi threshold voltage CMOS (MTCMOS) technology is a good solution which provides a high performance and low-power design without any …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 1–7 Read article
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Low Power 8-Bit Square Root Carry Select Adder Constructed By Using 8 Transistor Full Adder
Abstract: Carry select adder is the high speed adder which is designed to speed up arithmetic operations and to reduce the computation time. Carry select adder is used to perform fast arithmetic functions in data processing processors. Low power consumption, reduced area, reduced delay and increased speed are the most important features of the modern electronic system design. In this proposed work, 8 transistor full adder (8T full adder) is used …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 25–29 Read article
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Methodology of Standard Cell Library Design in .LIB Format
Abstract: The importance of standard cell library design methodology is growing with very-large-scale integration (VLSI) technology advancement due to its usage in VLSI EDA synthesis flows. In this paper, to best of our knowledge and information in any published literature no systematic method of standard cell and creating appropriate co-laterals. In this paper the standard cell design methodology, layout topology, methodology for creating characterized timing table has been developed using 250 …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 30–38 Read article
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A New Current Mode Quadrature Oscillator using Current Differencing Transconductance Amplifier (CDTA)
Abstract: This paper proposed a new current-mode quadrature oscillator using CDTA (Current Difference Transconductance Amplifier) as the active element. The proposed circuit uses only two grounded or virtually grounded capacitors, two grounded or virtually grounded resistors and two CDTAs. The functionality of the circuit is verified with the PSPICE simulation results.
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 39–42 Read article
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Design and Implementation of 2nd Order Gm-C IF Tuning Filter Operating at 900 MHz and 88–108 MHz Wireless System for Multi Standard Receiver
Abstract: This paper deals with design and optimization of folded cascode OTA-C filter, which works for frequencies that lead to a base band circuit design for RF application, is based on transistor sizing methodology and Simulation results are performed using SPICE software and BSIM3V3 model for CMOS 0.18 μm process, show that the designed folded cascode OTA has a 52 dB DC gain and provides a Unit gain bandwidth of around …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 8–24 Read article