Journal of VLSI Design Tools and Technology
Volume 3, Issue 1 (2013)
Published
Table of contents
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A High Performance Reference Circuit with Optimized Input Offset Operational Amplifier using Device Mismatch Model
Abstract: In this paper, author describes a band gap reference (BGR) circuit, having reference voltage 1.20V with maximum temperature coefficient of 63 ppm/0C in temperature range of –40 to 120 0C. The circuit operates in range of supply voltage, 3.0V to 3.6V. An operational amplifier (op-amp), whose input offset voltage is reduced upto 892 µV using Pelgrom’s device mismatch model is used in BGR. The power supply rejection ratio of circuit …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 1–7 Read article
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A New Sub-1 Volt Reference for Low Voltage Application Based on MOSFET’s Threshold Voltage Extractor
Abstract: A CMOS voltage reference circuit featuring MOS transistors threshold voltage extractor has been developed. The circuit implemented using 0.35µm CMOS AMS process generates a reference of 574 mV for a power supply of 3.3V with 726µW power consumption. The circuit presents a variation of 43 ppm/ºC for the –10 to –110ºC temperature, and 18.6 dB PSRR at 1 KHz. A vital analytical approach is presented to provide a universal design …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 14–19 Read article
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Reconfiguring CMOS Driver and Receiver Pair as Pseudo NMOS for Low-swing Signaling On-chip Interconnects
Abstract: The Low power bus architecture [9, 12, 13] consists of Driver, Receiver and Interconnects in between them inside the Chip. The Low power bus architecture [1] models are classified in to Symmetric and Asymmetric [7, 11, 14, 15] based on low voltage scaling technique and very simple design principles were utilized to construct driver, receiver and interconnects. The low power bus driver has the ability to switch from a low …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 20–27 Read article
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Reducing Crosstalk in Arithmetic and Logic Unit Part of a Processor
Abstract: Crosstalk is common in any digital systems and may occur due to coupling of signals which eventually have an impact on the working of a system. In this paper, an attempt is made to study the effect of crosstalk in 8-bit slice ALU, designed using 120 nm technology and suggested a method to reduce the crosstalk.Keywords: ALU, signal integrity, metal layers
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 28–32 Read article
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A New High Speed Low Power 1 Bit Full Adder
Abstract: This paper proposes a low power, low area and high speed 1-bit full adder compared to earlier 1bit full adder designs. The adder comprises of eight transistors with some modifications over the other existing design, so that it can invariably be used in the device with least nano device dimensions. The proposed design exhibits lower threshold loss and works faithfully in sub-threshold regime with appreciable voltage swing at lower power …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 8–13 Read article