Journal of Semiconductor Devices and Circuits
Volume 5, Issue 2 (2018)
Published
Table of contents
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Implementation and Analysis of Full Adder using low Power Adiabatic Techniques
Abstract: AbstractIn this study, authors have discussed, designed and compared the low power adiabatic logic energy efficient recovery logic (ECRL) and positive feedback of adiabatic logic (PFAL) with conventional Complementary Mosfet (CMOS) logic. A one-bit full adder using these design techniques are implemented and results are compared like power, delay, transistor count and power delay product. Tanner tool v13 is used for designing of schematic and simulation. From the result, it …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 1–8 Read article
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Different Compressor Adders
Abstract: AbstractMultipliers are one of the main blocks which decide the circuit performance as well as computation speed. In multiplication, addition of partial products contributes most to the circuit delay, power, and area. In this project, compressor adders are used to reduce this delay. Hence, compressors are a major part of the multiplier circuit that decides the overall speed of the system. For high-speed processing and higher systems, a huge number …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 19–26 Read article
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An Optimized 32 bit Carry Select Adder Using Modified BEC
Abstract: AbstractAdders play a major role in addition of numbers, multiplications and other advanced processors’ design. Among the conventional adder structures, carry select adder is known to be fastest adder. This adder circuit is used for the design of high speed processors. The CSLA adder architecture is such that it is of less power dissipation, area efficient and high speed. CSLA circuit for 8, 16, 32 bits is designed without multiplexer …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 27–32 Read article
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Current Fed Push-Pull Converter for High Voltage Gain Applications
Abstract: AbstractAn isolated high step up voltage gain with appropriate duty ratio with application on energy storage system is proposed. As push pull converters are step down converters, here, this topology will help in step up the voltage. This converters semiconductor device maintains zero current switching (ZCS). Push pull converter has only two devices with common ground with source requiring simple gate driving circuitry.Keywords: Current fed push-pull, variable frequency modulation, zero …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 33–42 Read article
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Closed Loop Control of Interleaved Buck Converter with Extremely Low Output Current Ripple
Abstract: AbstractIn this paper, the analysis and modeling of interleaved buck converter with PI controller is discussed. Converters are controlled by two active switches, which have the same switching frequency but 180° out of phase. The loss associated with the power device is half of the input voltage and the duty cycle is below 50%. By paralleling the converters, the input current can be shared among the inductors so that high …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 9–18 Read article