Volume 9, Issue 1 (2018)

Table of contents

• Published Subscription 11 Apr 2018

  Impact of Xilinx ISE Design Suite’s MAP and Generate Programming Optimization Settings on FPGAs Bitstream Size

  By Pravin N. Matte, Dilip D. Shah

  Abstract: AbstractIn SRAM based FPGA configuration bitstream resides in configuration memory. Bitstream contains information of CLBs, IOBs and logic interconnects. With increase in complexity of design, size of bitstream increases. Hence if size of bitstream is reduced, less configuration memory required. CAD tools used in FPGA based design has different settings which affects logic capacity, performance speed, resource utilization, power consumption, area required for placing designs etc. In this paper, we …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 1–8 Read article →

• Published Subscription 23 Apr 2018

  Study and Design of Reconfigurable Processor Peripherals using Xilinx Tools

  By Ipseeta Nanda, Nibedita Adhikari

  Abstract: AbstractXilinx Platform Studio used in this paper to create a reconfigurable processor system. The Xilinx Embedded Development Kit (EDK) software allows mapping processor of a Microblaze plus several on-chip peripheral bus (OPB) peripherals. The EDK bridges the gap between Hardware (HW) and Software (SW), flows by providing a single HW/SW design environment. Xilinx ISE is to create a top-level design hierarchy. It extends a fully software architecture by generating and …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 17–23 Read article →

• Published Subscription 15 May 2018

  Analysis and Design of Decoder Using Different Adiabatic Technique

  By Pankaj ., Bal Krishan

  Abstract: AbstractThe CMOS logic circuit depends upon charging and discharging of the capacitive load. This is one of the major sources of power dissipation. Adiabatic circuits are used to minimize the power dissipation. These circuits are based on feeding the charge back to power supply instead of discharging it to ground. The paper presented here is based on adiabatic logic style, PFAL (Positive Feedback Adiabatic Logic) and DFAL (Diode Free Adiabatic …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 24–29 Read article →

• Published Subscription 15 May 2018

  Metal Oxide Based Thin Film Transistors for Transparent and Flexible Electronics: Critical Review

  By Mahima Asthana, Arun Dev Dhar Dwivedi

  Abstract: AbstractTransparent and flexible electronics is new emerging research area. Various technologies are available for thin film transistors (TFT). Metal oxide semiconductors are suitable because of their high optical transparency, good electrical performance etc. These devices have advantages of a-Si and organic materials also. Advantages of these devices are low cost, low process complexity and temperature, and large-area scalability and large carrier mobility. In this paper research work is compared. This …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 30–40 Read article →

• Published Subscription 20 Apr 2018

  Comparative Analysis of FD-DMDG SON MOSFET over FD DMDG SOI MOSFET

  By Prashant Kumar, Munish Vashishath, P K Bansal

  Abstract: AbstractIn the recent past, Silicon-on-Insulator (SOI) shows better device performance in comparison to bulk Silicon devices but it still suffers from different short channel effects (SCEs). Recently a structure, Silicon on Nothing (SON), has been suggested and investigated. It is structured to be capable of substantial reduction of SCEs and present better electrical characteristics in comparison to SOI. The absence of the buried layer results in the reduced electrostatic coupling …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 9–16 Read article →