International Journal of VLSI Circuit Design & Technology
Volume 3, Issue 1 (2025)
Table of contents
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VLSI – Power, Expansion and Versatility
Abstract: The evolution of Very Large-Scale Integration (VLSI) technology has significantly transformed the landscape of modern electronics, driving innovations across diverse industries. This article explores the key attributes of VLSI, focusing on its power, expansion, and versatility. VLSI's power lies in its ability to integrate thousands to millions of transistors on a single chip, enabling the development of high-performance, energy-efficient devices. The expansion of VLSI technology is exemplified by its application …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 1–8 Read article
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VHDL Programming for Secure Bootloaders in IoT Security
Abstract: The proliferation of Internet of Things (IoT) devices has brought unparalleled connectivity and convenience. However, this increased connectivity comes with a heightened risk of security vulnerabilities. One of the most critical areas for securing IoT devices is the bootloader, the software responsible for initializing the device and loading the operating system. A compromised bootloader can lead to a complete takeover of the device, making it a prime target for malicious …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 19–28 Read article
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Securing IoT Wilderness with VHDL
Abstract: The Internet of Things (IoT) has revolutionized connectivity by integrating billions of devices and reshaping industries. However, this vast network also brings substantial security concerns. From compromised sensors to hijacked industrial control systems, the vulnerabilities within IoT devices can have far-reaching consequences. Hardware Security Modules (HSMs) provide a reliable and secure environment for performing cryptographic operations and safeguarding sensitive data. This article explores the crucial role of VHDL (VHSIC Hardware …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 29–40 Read article
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DFT Compatible Low Power EDAC Based on Clock Gating
Abstract: The in-situ EDAC architecture is normally hired in timing-error tolerant circuits in a try and decrease the conservative timing protect band due to procedure, voltage, and temperature (PVT) fluctuations. But with the addition of the latch-based totally data channel, extra detection, and propagation common sense, it makes the implementation of the layout for- testability (DFT) tough. We present a new low area test overhead DFT EDAC architecture with extreme reduction …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 41–53 Read article
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Reconfigurable AES Based AEAD For Multi-Mode Operation with Lightweight Compatibility
Abstract: The proposal is for a lightweight, multi-mode, reconfigurable authenticated encryption system with associated data (AEADs) based on AES. It is challenging to effectively integrate different AEADs in hardware because each one has its own mode of operation and/or subfunctions, even though some major AEADs share several basic components (such as the XOR-Encryption-XOR (XEX) scheme, block chaining, and advanced encryption standard (AES). This paper proposes hardware that effectively combines the basic …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 54–68 Read article