This paper proposes an efficient 5-Transistor XOR/XNOR circuit. The proposed circuit exhibits higher performance, lower power dissipation and power-delay product (PDP). The proposed design is compared with existing XOR/XNOR circuits for sub-threshold operation. It offers 1.31 × improvement in delay and 1.28 × improvement in PDP compared to its counterpart. It proves its robustness by offering 2.27 × improvement in delay variability, 1.32 × improvement in power dissipation variability and 1.27 × improvement in PDP variability.
