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• Published Subscription 30 Mar 2022

  Dynamic Comparators for Very High-Speed ADC’s

  By Dr. J. Geetha Ramani, Swapna S., Priyadharshini .S

  Abstract: The need for ultra- low power and space economical analog –to- digital converters (ADCs) is pushing towards the utilization of low voltage CMOS dynamic comparators to maximise the facility potency and speed. the traditional dynamic comparators have options like high input ohmic resistance, no static power dissipation and sensible strength against noise and couple. the downside is that giant numbers of transistors are accustomed minimize the offset, therefore the speed …

  Published in Recent Trends in Fluid Mechanics · Vol. 8, Issue 3, 2021 · pp. 32–45 Read article →