3 publications
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Low-Voltage Low-Power Single Supply Rail-to-Rail High Resolution Comparator in 0.18 µm CMOS TechnologyBy Anil K. Saini, priyanka dwivedi, Sanjay Singh
Abstract: This paper presents an absolute input rail-to-rail ultrahigh-resolution comparator for low-voltage low-power applications. To enhance the input range rail-to-rail, the proposed comparator utilizes dynamic configuration with a MOSFET-only clock booster to supply a boosted voltage for pre-amplifier stage. Cadence SPICE simulations of the proposed comparator in a 0.18 μm CMOS process confirm the rail-to-rail input range with a supply voltage of 1.2 V with a decision time less than 9 …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 87–91 Read article →
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Design of a 10-bit Segmented Current-Steering CMOS D/A Converter for High Speed Communication SystemBy Anil K. Saini, Sanjay Singh
Abstract: In the present work, design of a 10-bit digital-to-analog (D/A) converter using current segmentation architecture in 0.35 µm double-poly, four-metal, CMOS process has been attempted. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.8 and 2.5 least significant bits (LSBs) respectively. For sampling frequency of 12-MSample/s, the spurious free dynamic range (SFDR) is better than 56 dB for signal up to Nyquist rate. The worst case power consumption …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 38–43 Read article →
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A High Performance Reference Circuit with Optimized Input Offset Operational Amplifier using Device Mismatch ModelBy Anil K. Saini, Kapil K. Rajput, Sanjay Singh, Ravi Saini
Abstract: In this paper, author describes a band gap reference (BGR) circuit, having reference voltage 1.20V with maximum temperature coefficient of 63 ppm/0C in temperature range of –40 to 120 0C. The circuit operates in range of supply voltage, 3.0V to 3.6V. An operational amplifier (op-amp), whose input offset voltage is reduced upto 892 µV using Pelgrom’s device mismatch model is used in BGR. The power supply rejection ratio of circuit …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 1–7 Read article →