1 publication

• Published Subscription 4 Aug 2018

  Optimization of a Digital Adder Design Using MOSFET and FinFET Technology

  By Ritu Dagar, Preet Kaur

  Abstract: AbstractIn this study, a very low power high speed Adder is presented by using short gate mode technique and voltage scaling system for FinFET. MOSFET and FinFET technique is used on 32 nm by adders which compare delay and average power. Parametric study of fins vs. power is also performed in the study. Synopsys HSPICE software is used for obtaining the simulation results. Simulation results show that low power is …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 2, 2018 · pp. 30–33 Read article →