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Design of Ultra-Low-Power Robust SRAM CellBy Paritosh Sharma, Yogendra Kumar Upadhyay, Kshetra Singh
Abstract: SRAM is designed to provide an interface with CPU and to replace DRAMs in systems that require very low power consumption. Low power SRAM design is crucial since it takes a large fraction of total power and die area in high-performance processors. An SRAM cell must meet the requirements for the operation in submicron/nano ranges. The scaling of CMOS technology has significant impacts on SRAM cell random fluctuation of electrical …
Published in Nano Trends – A Journal of Nano Technology & Its Applications · Vol. 21, Issue 2, 2019 · pp. 7–18 Read article →