1 publication

• Published Subscription 15 May 2018

  Analysis and Design of Decoder Using Different Adiabatic Technique

  By Pankaj ., Bal Krishan

  Abstract: AbstractThe CMOS logic circuit depends upon charging and discharging of the capacitive load. This is one of the major sources of power dissipation. Adiabatic circuits are used to minimize the power dissipation. These circuits are based on feeding the charge back to power supply instead of discharging it to ground. The paper presented here is based on adiabatic logic style, PFAL (Positive Feedback Adiabatic Logic) and DFAL (Diode Free Adiabatic …

  Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 24–29 Read article →