1 publication

• Published Subscription 13 Jan 2021

  Performance Analysis of 1-Bit Full Adder using GDI and CMOS Logic

  By Bharat H. Nagpara, Lakum Kalpesh

  Abstract: The adder is one of the most essential part in math processor, multiplier, and in various scientific applications. Full adder plays important role in multiplier architecture. In this paper a 1-bit full adder using GDI and CMOS logic has been implemented and comparative analysis has been done. The less delay and low power consumption is achieved for this implementation. This paper presents comparison of number of transistors have been used …

  Published in Journal of Electronic Design Technology · Vol. 6, Issue 2, 2015 · pp. 18–22 Read article →