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Impact of Source/Drain Engineering on Performance of Single Gate and Dual Gate Junctionless MOSFETBy Jyotsana Singh, Narendra Yadava
Abstract: Abstract: This letter is the study on impact of source/drain engineering on Single Gate (SG) and Dual Gate (DG) Junctionless MOSFET. Both the proposed MOSFET have Gate Stacking and highly doped source/drain region, so name suggested is Highly Doped Source Drain Gate Stack Junctionless (HDSD-GSJL) MOSFET. Here we investigate the effect of highly doped source/drain, gate stacking and double gate on junctionless MOSFET. The investigation is performed in relations of …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 1, 2019 · pp. 10–14 Read article →