1 publication

• Published Subscription 9 Aug 2019

  Implementation and Simulation of High-Speed Dynamic Latch Comparator for ADC

  By jatin A. jalal, mehul L Patel

  Abstract: As per emerging issues in analog-mixed signal (AMS) design towards high-speed and low power, limits the performance of high-speed applications. Circuit complexity, speed, offset voltage and resolutions are essential parameter of comparator that affects the analog-to-digital converter (ADC) performance. Based on specifications, to achieve lower offset voltage and higher load drivability of latched comparator is presented. Moreover, the circuit is able to reduce power dissipation as the topology is based …

  Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 99–103 Read article →