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3D Simulation of Multi-Gate Mosfet Analysis for Analog Circuit Design ParametersBy Nirmal D, Thaya J. S., Manoj S., Lyndon B. G., Jebalin B. K., Chacko J. K.
Abstract: Chip density and performance improvements of semiconductor devices have been driven by their aggressive scaling. The performance of multi-gate FET for analog applications is explored in this paper. Analog operation of CMOS devices and its parameters are very important for future cutting edge technologies. The multi-gate technology shows excellent scalability and better immunity to short channel effects in MOSFETs. They are being easily assessed for CMOS applications beyond the 45 …
Published in Journal of Semiconductor Devices and Circuits · Vol. 1, Issue 2, 2014 · pp. 1–8 Read article →