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Suitability of Various Low Power Strategies for SRAM Design: A SurveyBy Hitesh Pahuja, Sudhakar Panday, Balwinder Singh
Abstract: In very high performance system on chip, static power dissipation plays a dominant role compared to dynamic component and it increases with technology scaling. Scaling of bulk MOSFET faces more and more challenges at 45 nm technology or below by producing short channel effect (SCE) which leads to increase in leakage current. An obstacle with bulk MOSFET at 45 nm or below gate length includes SCE, subthreshold leakage and gate …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 1, 2015 · pp. 6–13 Read article →