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    Design of 6-Bit Two-step Flash ADC for High Speed and Low Power Applications

    Abstract: In this paper, 6-bit two-step Flash ADC operated at the 2 GS/s is designed, with optimized performance for frequency domain applications. To get the best performance, the coarse convertor of 2-bit and the fine convertor of 4-bit are chosen. The comparator design is done with optimum power and area with two power supplies. Intermediate state accuracy increased by thermometer coded current steering DAC. The DNL and INL specifications are chosen …

    Published in Journal of Electronic Design Technology · Vol. 3, Issue 1-3, 2012 · pp. 29–39 Read article

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