2 publications
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Published Subscription Original Research
Study the Effect of Applied Gate Voltage on Threshold Potential and Carrier Transport Behavior of Three-Terminal Novel Prototype Device having Configuration P-type Si/SiO2/CuFeS2/AlBy Asmita Patra, Suman Mahata, Animesh Layek
Abstract: This study presents a trial approach for the fabrication and characterization of a novel p-Si/SiO₂/CuFeS₂/Al field-dependent three-terminal electronic device designed to investigate charge transport behavior across multiple semiconductor junctions under externally applied bias voltages. The proposed prototype incorporates CuFeS₂ (chalcopyrite) as the active semiconductor layer, marking its first reported application in a field-induced electronic device architecture. The device was fabricated using a layered heterostructure consisting of p-type silicon, a silicon …
Published in International Journal of Crystalline Materials · Vol. 3, Issue 2, 2026 · pp. 1–7 Read article →
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Published Subscription Original Research
Growth of Cu2O on TCO by SILAR method acts as an alternative buffer electrode layer towards the development of organic solar cellBy Asmita Patra, Suman Mahata, Animesh Layek
Abstract: In many types of optoelectronic devices, layer of PEDOT: PSS is sandwiched between the indium-tin oxide (ITO) electrode and the active layer. Buffer PEDOT: PSS provides a well- defined work function which is higher than that of ITO (4.2eV), it smooths the ITO surface and so avoids shorts, and it also protects the active layer from ingress of indium or oxygen, leading to longer device lifetimes. The role of PEDOT: …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 13, Issue 2, 2026 · pp. 20–27 Read article →