2 publications

• Published Subscription 6 Feb 2019

  A Novel Design for High Speed & Area Efficient Compressor Based Vedic Multiplier

  By Aji Harikumar, Reneesh C. Zacharia

  Abstract: Multipliers are the most important part in any arithmetic and logic unit, AbstractMultipliers are the most important part in any arithmetic and logic unit, accumulators and digital signal processors. Due to the increasing constraints on delay, the design of faster multipliers is emphasized. Among several multipliers, Vedic multipliers are preferred for their speed of operation. Here the proposed Vedic multiplication techniques are based on “URDHVA TIRYAKBHYAM” a fast and efficient …

  Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 1–10 Read article →

• Published Subscription 20 Aug 2018

  Different Compressor Adders

  By Aji Harikumar, Reneesh C. Zacharia

  Abstract: AbstractMultipliers are one of the main blocks which decide the circuit performance as well as computation speed. In multiplication, addition of partial products contributes most to the circuit delay, power, and area. In this project, compressor adders are used to reduce this delay. Hence, compressors are a major part of the multiplier circuit that decides the overall speed of the system. For high-speed processing and higher systems, a huge number …

  Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 19–26 Read article →