1 publication

• Published Subscription Review Article 20 Aug 2026

  Architectural Evolution of RISC Processors: From Early Research Prototypes to Modern Industrial Implementations

  By Aditya Chauhan, Mitesh Limachia, Narendra Chauhan, Purvang Dalal

  Abstract: This paper surveys the architectural evolution of Reduced Instruction Set Computer (RISC) architectures from early research prototypes to modern industrial processors, tracing four decades of design refinement across academic, embedded, server, mobile, and open- hardware ecosystems. Core ISA principles, pipeline evolution, compiler–hardware co-design, and quantitative performance modeling are analyzed through four representative industrial implementations: MIPS 74K, SPARC T4, ARM Cortex-A72, and SiFive U74 (RISC-V). Each processor is examined in terms …

  Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 · pp. 29–39 Read article →