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Performance Analysis of Complimentary Pass Transistor Logic Based Multiplexer Using Dual-gate FinFET TechnologyBy Saurabh Kumawat, Purushottam Kumawat, Suchitra .
Abstract: AbstractThis paper presents the design and analysis of double gate FinFET complimentary pass transistor logic (CPL) multiplexer. The circuit of multiplexer (MUX) using CPL is used for comparison of performance parameters like average power consumption, rise/fall time, delay, slew rate, PDP and EDP. Multiplexer is a digital circuit, it has inputs and select line; select lines are used for select input lines to transfer data to the output end. The …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 41–48 Read article →