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• Published Subscription 1 Feb 2020

  Reducing Cell Density Congestion Issue in Chip Design

  By S. Mohan Das, Shaik Mahammad Rafi

  Abstract: AbstractThe congestion issues reduce with the help of shrinking process technologies. Here, typical placement objectives involve reducing cell density congestion in a chip design. Congestion reducing is the least understand; however, it models route ability most accurately. The congestion issue is cell density (commonly believed to be very effective) does not always work well, so here by applying the partial block technique for the cell density is among the best …

  Published in Journal of Microelectronics and Solid State Devices · Vol. 6, Issue 3, 2019 · pp. 11–17 Read article →