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An Optimized FIR Filter Architecture Using Approximate Radix-8 Booth MultiplierBy Santo Mathew Mathew, Sangeetha KV K V
Abstract: This paper presents an optimized FIR filter architecture using approximate radix-8 Booth multiplier. The radix-8 Booth multiplier is slow due to the complexity of generating the odd multiples of the multiplicand. Hence, for calculating the sum of 1x and 2x of a binary number x, an approximate 2-bit adder is deliberately designed. This adder requires a small area, a low power and a short critical path delay. Subsequently, the less …
Published in Journal of Mobile Computing, Communications & Mobile Networks · Vol. 5, Issue 1, 2018 · pp. 1–7 Read article →