2 publications

• Published Subscription 18 May 2018

  Analysis of Signal Delay in Carbon Nano Tube based Interconnects at 32 nm Technology Node

  By Ashish Jha, Suchitra ., Purushottam Kumawat

  Abstract: AbstractIn the present world demand for portable devices and high speed processor is rising which brings out a challenging issue of scaling for designers. In this paper, we have presented the effect of copper and CNT based interconnects for different length at 32 nm technology node. The performance of both types of interconnects are analyzed and compared in form of propagation delay. Propagation delay in interconnects between the elements is …

  Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 20–26 Read article →

• Published Subscription 19 Mar 2018

  Performance Analysis of 1-Bit Half Adder using Different Combinational MOS Logics

  By Ashish Jha, Purushottam Kumawat

  Abstract: AbstractAdder is required for many processors designing like microprocessors, digital signal processors, image processing and various VLSI applications. The overall performance of system depends upon the adder circuits due to its presence mainly in critical paths of system. This paper presents half adder circuits using different combinational MOS logics. All the circuits were analyzed to find the most suitable circuit which consumes less power without costing the speed of the …

  Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 19–27 Read article →