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Meher Abbas

Affiliation: Department of ECE, Bonam Venkata Chalamayya Engineering College(A), Odalarevu
Department: UG Scholar
Location: India

1 article

Published Subscription Review Article 22 Apr 2026
Design of a Verilog HDL-Based Advanced Intelligent Automatic Railway Gate Control System
By Meher Abbas, Pothuraju Poojitha, Pithani Harika, Perabattula Sri Rama Durga Satya Swamy, Narni Venkata Durga Anjan Kumar, Harika Pangam, M S S Sudheer Naidu

Abstract: Human mistake, sluggish reaction times, and manual gate operation are common causes of railway level crossing accidents. This project suggests an Intelligent Automatic Railway Gate Controller made with Verilog HDL and simulated in Xilinx Vivado to lessen these mishaps. With the goal of improving safety at unmanned railway crossings, the system is intended to offer a dependable and entirely automated solution. Without human interaction, the railway gate is automatically controlled …

Published in International Journal of Electronics Automation · Vol. 4, Issue 1, 2026 Read article