1 publication

• Published Subscription 31 Dec 2019

  Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique

  By Radhika P, Jyothisree K R

  Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …

  Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article →