1 publication

• Published Subscription 23 May 2019

  FPGA Implementation of Reed Solomon Encoder and Decoder

  By Saurabh Singh, Mohan Khambalkar, Ankur Varma

  Abstract: Abstract: Forward Error Correcting (FEC) is a technique employed to enhance data security & reliability. An efficient coding technique is essential to ensure data security. Reed Solomon Codes are widely used to provide error correction capability against burst error. This paper presents the design & FPGA implementation of RS (7, 3) codes. The design is entirely parameterized and can be scaled readily for a wide range of a number of …

  Published in Current Trends in Signal Processing · Vol. 9, Issue 1, 2019 · pp. 10–16 Read article →