A High Frequency and Power Efficient Memristor Emulator and Its Application - Sudhir Singh; Manoj Josh; Rahul Kumar Gupta; Stuti Sachan; Suman Chaudhary (International Journal of Electrical and Communication Engineering Technology, 2025)
This study presents a small, energy-efficient memristor emulator made for use at high frequencies. The proposed circuit has a simple design that only includes three n-type MOSFETs and a grounded capacitor. This means that there is no need for active components or DC biasing. This streamlined architecture not only makes things easier, but it also uses very little power, with dynamic and static power measured at 15.82 μW and 65.6 μW, respectively. The design copies the most important memristive behaviour, especially the pinched hysteresis loop in the current-voltage relationship, even at frequencies up to 100 MHz. The emulator was made with 90 nm CMOS technology and works well across a wide range of frequencies. The emulator not only has a small size and low power use, but it also works well in a wide range of operating conditions. Its ability to keep the pinched hysteresis loop that memristive systems have, even at high frequencies, shows how reliable and faithful it is. This design is especially good for use in high-speed neuromorphic computing systems, signal processing circuits, and non-volatile memory applications. Using only three nMOS transistors and a grounded capacitor makes it easier to make and more scalable. Overall, the suggested emulator is a useful and effective way to solve problems with high-frequency analog computing platforms.
Keywords: MOSFET-only design; Memristor Emulator; Neuromorphic computing; SRAM integration; energy-efficient circuit; grounded capacitor; high-frequency operation; in-memory processing; pinched hysteresis behavior